Input/Output
Problems
• Computers have a wide variety of peripherals
• Many are not connected directly to system or expansion bus
• Most peripherals are slower than CPU and RAM; a few are
faster
• Word length for peripherals may vary from the CPU
• Data format may vary (e.g., one word might include parity
bits)
Generic
Model of I/O Module
External
Devices
- Human readable
—Screen, printer, keyboard
Machine
readable
—Monitoring and control
•Communication
—Modem
—Network Interface Card (NIC)
External
Device Block Diagram
I/O
Module Diagram
Three
Techniques for Input of a Block of Data
Memory
Mapped and Isolated I/O
Simple
Interrupt Processing
Changes
in Memory and Registers for an Interrupt
Typical
DMA Module Diagram
DMA
and Interrupt Breakpoints During an Instruction Cycle
DMA
Configurations (1)
•Single
Bus, Detached DMA controller
•Each
transfer uses bus twice
—I/O to DMA then DMA to memory
•CPU
is suspended twice
DMA
Configurations (2)
•Single
Bus, Integrated DMA controller
•Controller
may support >1 device
•Each
transfer uses bus once
—DMA to memory
•CPU
is suspended once
DMA
Configurations (3)
•Separate
I/O Bus
•Bus
supports all DMA enabled devices
•Each
transfer uses bus once
—DMA to memory
•CPU
is suspended once
DMA Usage of Systems Bus
I/O Channel Architecture
Simple
FireWire Configuration
FireWire
Protocol Stack
FireWire
Subactions
ENJOY
YOUR
COMPUTER ORGANISATION
&
ARCHITECTURE
:)
-Muhammad Shakir-
B031310451
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